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 For Information Equipment
MN8390-C
LCD Panel Source Driver
Overview
The MN8390-C is for displaying an analog video signal on a TFT color liquid crystal display panel in such applications as LCD television sets and video cameras.
Features
Lower power consumption and reduced EMI emissions owing to digital 3.0 volt power supply and analog 5.0 volt power supply Broad dynamic range of 4.6 V (for power supply voltage of 5.0 V) Low discrepancies between output pins: 20 mV (typ.) 240 output channels Support for striped and delta panel layouts by switching analog (R, G, B) signals Support for sequential sampling mode (with CLK1 to CLK3 inputs) Support for serial cascade connections Automatic clock suspension after reading specified amount of data Choice of shift register shift directions (right/left)
Applications
LCD television sets and video cameras
MN8390-C
For Information Equipment
Block Diagram
QA80 QB80 QC80 STHL QA1 QB1 QC1
VDD2 VSS2 VBS OE
Bias control circuit
Output buffer
240 VA,VB, VC D1 VDD1 VSS1 240 Clock generator circuit
3
Analog multiplexer
3
Two sample-and-hold circuits
CLK1, CLK2, CLK3
3
Bidirectional 240-bit shift register
MOD RL STHR TEST1 TEST2 Shift register control circuit
For Information Equipment
Pin Descriptions
Pin No. 99 to 102 21 to 24 Symbol STHR STHL Pin Name Shift data I/O I/O I/O
MN8390-C
Function Description These are I/O pins for the bidirectional shift register. The RL pin controls their I/O directions.
RL H L STHR Input Output STHL Output Input
27 to 30
RL
Shift direction control
I
(1) Input The pins provide input data to the shift register's first stage. The shift register reads in this data at the rising edge of the CLK1 signal. (2) Output In a cascade connection, the pins provide the data for the synchronizing output stage synchronized with the rising edge of the CLK1 signal. This pin controls the shift direction for the bidirectional shift register. RL="H" : QA1 QB1 QC1 QC80 RL="L" : QC80 QB80 QA80 QA1
42 to 45 37 to 40 32 to 35
CLK1 to 3
Clock input
I
These pins provide the shift clock signals that the sample-and-hold circuits use to generate the data for the LCD drive output pins (QA1-QC80). The following lists the relationships between these clock signals and the output pins. CLK1 RL="H": RL="L": CLK2: CLK3 RL="H": RL="L": QA1 to QA80 QC1 to QC80 QB1 to QB80 QC1 to QC80 QA1 to QA80
70 to 73
OE
Output enable
I
At each rising edge of this signal, the MN8390-C switches between its two sample-and-hold circuits and initiates output of new data. When the outputs reach the drive potential, the MN8390-C automatically reduces the drive power, but maintains the outputs at the drive potential.
47 to 50
D1
Analog signal swiching
I
This pin controls the mapping between the three analog inputs (VA, VB, and VC) and the drive outputs (QA, QB, and QC).
D1 L Input VA VB VC VA VB VC Output QA1 to QA80 QB1 to QB80 QC1 to QC80 QB1 to QB80 QC1 to QC80 QA1 to QA80
H
MN8390-C
Pin Descriptions
Pin No. 93 to 97 Symbol VBS Pin Name Bias adjustment I/O I
For Information Equipment
Function Description The voltage applied to this pin adjusts the output buffer bias and thus the drive capacity of the LCD drive outputs.
87 to 91 81 to 85 75 to 79 147, 149 151 to 385 387, 389 391 52 62 61 63 to 68 9 to 18 105 to 114 53 to 58 127 to 142 396 to 409
VA VB VC QA1 to 80 QB1 to 80 QC1 to 80 MOD TEST1 TEST2 VDD1 VDD2 V SS1 V SS2
Analog signal input LCD drive output
I
These pins accept the analog signal inputs for routing to the LCD drive outputs.
O
These pins yield the levels obtained by applying the sample-and-hold circuits to the analog inputs (VA, VB, and VC).
Mode selection signal input Test input Test input Power supply for digital circuits Power supply for analog circuits Ground for digital circuits Ground for analog circuits
I I I -- -- -- --
Connect this pin to VSS1 for sequential sampling mode. Connect this pin to VDD1. Connect this pin to VDD1. These pins supply the driving potential for the logic and other digital circuits. These pins supply the driving potential for the sample-and-hold and other analog circuits. These pins supply the ground potential for the logic and other digital circuits. These pins supply the ground potential for the sample-and-hold and other analog circuits.


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